Geodesic
Minimal parallel prefix circuits
Vestnik Moskovskogo universiteta. Matematika, mehanika, no. 5 (2011), pp. 48-51 
I. S. Sergeev. Minimal parallel prefix circuits. Vestnik Moskovskogo universiteta. Matematika, mehanika, no. 5 (2011), pp. 48-51. http://geodesic.mathdoc.fr/item/VMUMM_2011_5_a9/
@article{VMUMM_2011_5_a9,
     author = {I. S. Sergeev},
     title = {Minimal parallel prefix circuits},
     journal = {Vestnik Moskovskogo universiteta. Matematika, mehanika},
     pages = {48--51},
     year = {2011},
     number = {5},
     language = {ru},
     url = {http://geodesic.mathdoc.fr/item/VMUMM_2011_5_a9/}
}
TY  - JOUR
AU  - I. S. Sergeev
TI  - Minimal parallel prefix circuits
JO  - Vestnik Moskovskogo universiteta. Matematika, mehanika
PY  - 2011
SP  - 48
EP  - 51
IS  - 5
UR  - http://geodesic.mathdoc.fr/item/VMUMM_2011_5_a9/
LA  - ru
ID  - VMUMM_2011_5_a9
ER  - 
%0 Journal Article
%A I. S. Sergeev
%T Minimal parallel prefix circuits
%J Vestnik Moskovskogo universiteta. Matematika, mehanika
%D 2011
%P 48-51
%N 5
%U http://geodesic.mathdoc.fr/item/VMUMM_2011_5_a9/
%G ru
%F VMUMM_2011_5_a9

Voir la notice de l'article provenant de la source Math-Net.Ru

The exact complexity of a minimal prefix circuit of width $m$ and depth $\lceil\log_2 m\rceil$ is obtained in the case when $m$ is a power of two. New upper bounds for the complexity of prefix circuits are obtained under various depth restrictions and separately for the circuits of XOR-gates.