Geodesic
Minimal parallel prefix circuits
Vestnik Moskovskogo universiteta. Matematika, mehanika, no. 5 (2011), pp. 48-51

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The exact complexity of a minimal prefix circuit of width $m$ and depth $\lceil\log_2 m\rceil$ is obtained in the case when $m$ is a power of two. New upper bounds for the complexity of prefix circuits are obtained under various depth restrictions and separately for the circuits of XOR-gates. 
@article{VMUMM_2011_5_a9,
     author = {I. S. Sergeev},
     title = {Minimal parallel prefix circuits},
     journal = {Vestnik Moskovskogo universiteta. Matematika, mehanika},
     pages = {48--51},
     publisher = {mathdoc},
     number = {5},
     year = {2011},
     language = {ru},
     url = {http://geodesic.mathdoc.fr/item/VMUMM_2011_5_a9/}
}
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I. S. Sergeev. Minimal parallel prefix circuits. Vestnik Moskovskogo universiteta. Matematika, mehanika, no. 5 (2011), pp. 48-51. http://geodesic.mathdoc.fr/item/VMUMM_2011_5_a9/