Geodesic
Polyhedron approximation of tile set
Trudy Instituta matematiki, Tome 17 (2009) no. 2, pp. 84-93.

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The problem of an apriory estimation of tiling efficiency at application of tiling to loop nests parallelization or locality improvement is considered. The method of approximation of tile set is constructed. The method allows to build tile set approximations by parallelepipeds and to choose from them optimum. 
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P. I. Sobolevsky; S. V. Bahanovitch. Polyhedron approximation of tile set. Trudy Instituta matematiki, Tome 17 (2009) no. 2, pp. 84-93. http://geodesic.mathdoc.fr/item/TIMB_2009_17_2_a8/

[1] Ramanujam J., Sadayappaan P., “Tiling of iteration spaces for multicomputers”, Proc. of Int. Conf. on Parallel Processing, 2 (1990), 179–186 | MR

[2] Boulet P., Darte A., Risset T., Robert Y., “(Pen)-ultimate tiling?”, Integration, The VLSI J., 17 (1994), 33–51 | DOI

[3] Xue J., “Communication-minimal tiling of uniform dependence loops”, J. of Parallel and Distributed Computing, 1:42 (1997), 42–59 | DOI

[4] Schreiber R., Dongarra J., Automatic blocking of nested loops, Tech. report 90.38, RIACS, 1997

[5] Ohta H., Saito Y., Kainaga M., Ono H., “Optimal tile size adjustment in compiling general DOACROSS loop nests”, Proc. of Int. Conf. on Supercomputing, ACM Press, 1995, 270–279

[6] Hodzic E., Shang W., “On supernode transformation with minimized total running time”, IEEE Trans. Parallel and Distributed Systems, 9:5 (1998), 417–428 | DOI

[7] Hodzic E., Shang W., “On-time optimal supernode shape”, IEEE Trans. Parallel and Distributed Systems, 13:10 (2002), 1220–1223 | DOI

[8] Bakhanovich S.V., Sobolevskii P.I., “Otobrazhenie algoritmov na vychislitelnye sistemy s raspredelennoi pamyatyu: optimizatsiya tailinga dlya odno- i dvumernykh topologii”, Vestsi NAN Belarusi. Ser. fiz.-mat. navuk, 2006, no. 2, 106–112 | MR

[9] Bakhanovich S.V., Sobolevskii P.I., “Optimizatsiya tailinga pri LSGP strategii otobrazheniya algoritmov na superkompyutery s raspredelennoi pamyatyu”, Vestsi NAN Belarusi. Ser. fiz.-mat. navuk, 2007, no. 3, 113–118