Geodesic
Path delay fault classification
Prikladnaâ diskretnaâ matematika, no. 10 (2009), pp. 68-69.

Voir la notice de l'article provenant de la source Math-Net.Ru

A path delay fault classification based on equivalent normal form (e. n. f.) analysis is suggested. The conditions of robust, non-robust and functional fault manifestation for combinational circuit are formulated. A justification of path delay fault masking is given. 
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     author = {A. Yu. Matrosova},
     title = {Path delay fault classification},
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     url = {http://geodesic.mathdoc.fr/item/PDM_2009_10_a34/}
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A. Yu. Matrosova. Path delay fault classification. Prikladnaâ diskretnaâ matematika, no. 10 (2009), pp. 68-69. http://geodesic.mathdoc.fr/item/PDM_2009_10_a34/

[1] Devadas\;S., Keitzer\;K., “Synthesis of Robust Delay Delay-Fault-Testable Circuits: Theory”, IEEE Transactions on Computer-Aided Design, 11:1 (1992), 87–101, January | DOI