Geodesic
FPGA implementation of FAPKC symmetric equivalent
Prikladnaya Diskretnaya Matematika. Supplement, no. 6 (2013), pp. 36-38 Cet article a éte moissonné depuis la source Math-Net.Ru

Voir la notice de l'article

FPGA implementation of the FAPKC symmetric equivalent (called FASKC) is presented. The throughput/area comparison of the FASKC with the other finite automata cryptosystems is made. The FPGA implementation comparison of the FASKC, AES and other contemporary block ciphers is given.
Keywords: non-linear automaton, invertible with delay automaton, finite automata cryptosystem, FAPKC, PLD, FPGA, VHDL.
Mots-clés : FASKC 
@article{PDMA_2013_6_a18,
     author = {D. S. Kovalev},
     title = {FPGA implementation of {FAPKC} symmetric equivalent},
     journal = {Prikladnaya Diskretnaya Matematika. Supplement},
     pages = {36--38},
     year = {2013},
     number = {6},
     language = {ru},
     url = {http://geodesic.mathdoc.fr/item/PDMA_2013_6_a18/}
}
TY  - JOUR
AU  - D. S. Kovalev
TI  - FPGA implementation of FAPKC symmetric equivalent
JO  - Prikladnaya Diskretnaya Matematika. Supplement
PY  - 2013
SP  - 36
EP  - 38
IS  - 6
UR  - http://geodesic.mathdoc.fr/item/PDMA_2013_6_a18/
LA  - ru
ID  - PDMA_2013_6_a18
ER  - 
%0 Journal Article
%A D. S. Kovalev
%T FPGA implementation of FAPKC symmetric equivalent
%J Prikladnaya Diskretnaya Matematika. Supplement
%D 2013
%P 36-38
%N 6
%U http://geodesic.mathdoc.fr/item/PDMA_2013_6_a18/
%G ru
%F PDMA_2013_6_a18
D. S. Kovalev. FPGA implementation of FAPKC symmetric equivalent. Prikladnaya Diskretnaya Matematika. Supplement, no. 6 (2013), pp. 36-38. http://geodesic.mathdoc.fr/item/PDMA_2013_6_a18/

[1] Kovalev D. S., Trenkaev V. N., “Realizatsiya na PLIS shifra FAPKC”, Prikladnaya diskretnaya matematika. Prilozhenie, 2011, no. 4, 33–34

[2] Kovalev D. S., “Realizatsiya na PLIS shifra FAPKC-4”, Prikladnaya diskretnaya matematika. Prilozhenie, 2012, no. 5, 44–46

[3] Tao R. J., Finite automata and application to cryptography, Tsinghua University Press; Springer, 2008 | MR | Zbl

[4] Abubaker S., Lightweight and secure cryptosystems based on finite automata, http://webdocs.cs.ualberta.ca/ṽogt/networks/3-2-Abubaker.pdf

[5] Zakrevskii A. D., “Metod avtomaticheskoi shifratsii soobschenii”, Prikladnaya diskretnaya matematika, 2009, no. 2, 127–137 | MR

[6] Miloshenko A. V., “Apparatnaya realizatsiya shifrsistemy, osnovannoi na avtomate Zakrevskogo”, Prikladnaya diskretnaya matematika. Prilozhenie, 2010, no. 3, 23–24

[7] Rouvroy G., Standaert F. X., Quisquater J. J., Legat J. D., “Compact and efficient encryption/decryption module for FPGA implementation of the AES Rijndael very well suited for small embedded applications”, Proc. Intern. Conf. Inform. Technology: Coding and Computing, 2 (2004), 583–587

[8] Kitsos P., Sklavos N., Galanis M. D., Koufopavlou O., “64-bit Block ciphers: hardware implementations and comparison analysis”, Comput. Electric. Eng., 2004, no. 30, 593–604 | DOI | Zbl