A mathematical model of an integrated circuit structure
Matematičeskoe modelirovanie, Tome 19 (2007) no. 4, pp. 37-44.

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A formal mathematical object is specified and offered for using as a mathematical model of a microelectronic unit structure. The model is intended to be employed in a computer-aided design system at the stage of computing the capacitances of the unit's connecting conductors. A technique for representing the model is offered. The technique provides a possibility to minimize the dimension of the model; the precision of the technique is explored. The results are valid for a broad class of problems solved by means of the Green function technique.
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I. A. Konnikov. A mathematical model of an integrated circuit structure. Matematičeskoe modelirovanie, Tome 19 (2007) no. 4, pp. 37-44. http://geodesic.mathdoc.fr/item/MM_2007_19_4_a3/

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