Matematičeskoe modelirovanie, Tome 3 (1991) no. 8, pp. 63-71
Citer cet article
M. P. Belyanin; L. V. Kalachev; E. V. Mamontov. Boundary layer method for semiconductor devices modelling. Matematičeskoe modelirovanie, Tome 3 (1991) no. 8, pp. 63-71. http://geodesic.mathdoc.fr/item/MM_1991_3_8_a7/
@article{MM_1991_3_8_a7,
author = {M. P. Belyanin and L. V. Kalachev and E. V. Mamontov},
title = {Boundary layer method for semiconductor devices modelling},
journal = {Matemati\v{c}eskoe modelirovanie},
pages = {63--71},
year = {1991},
volume = {3},
number = {8},
language = {ru},
url = {http://geodesic.mathdoc.fr/item/MM_1991_3_8_a7/}
}
TY - JOUR
AU - M. P. Belyanin
AU - L. V. Kalachev
AU - E. V. Mamontov
TI - Boundary layer method for semiconductor devices modelling
JO - Matematičeskoe modelirovanie
PY - 1991
SP - 63
EP - 71
VL - 3
IS - 8
UR - http://geodesic.mathdoc.fr/item/MM_1991_3_8_a7/
LA - ru
ID - MM_1991_3_8_a7
ER -
%0 Journal Article
%A M. P. Belyanin
%A L. V. Kalachev
%A E. V. Mamontov
%T Boundary layer method for semiconductor devices modelling
%J Matematičeskoe modelirovanie
%D 1991
%P 63-71
%V 3
%N 8
%U http://geodesic.mathdoc.fr/item/MM_1991_3_8_a7/
%G ru
%F MM_1991_3_8_a7
We consider 2-dimensional boundary value problem, modelling a steady state of a planar semiconductor device. We use the boundary layer technique for the asymptotic solution constracting, that can be apply for computer code.
