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Boundary layer method for semiconductor devices modelling
Matematičeskoe modelirovanie, Tome 3 (1991) no. 8, pp. 63-71 Cet article a éte moissonné depuis la source Math-Net.Ru

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We consider 2-dimensional boundary value problem, modelling a steady state of a planar semiconductor device. We use the boundary layer technique for the asymptotic solution constracting, that can be apply for computer code. 
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     author = {M. P. Belyanin and L. V. Kalachev and E. V. Mamontov},
     title = {Boundary layer method for semiconductor devices modelling},
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     pages = {63--71},
     year = {1991},
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     number = {8},
     language = {ru},
     url = {http://geodesic.mathdoc.fr/item/MM_1991_3_8_a7/}
}
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M. P. Belyanin; L. V. Kalachev; E. V. Mamontov. Boundary layer method for semiconductor devices modelling. Matematičeskoe modelirovanie, Tome 3 (1991) no. 8, pp. 63-71. http://geodesic.mathdoc.fr/item/MM_1991_3_8_a7/