@article{VYURV_2015_4_3_a2,
author = {I. I. Levin and A. I. Dordopulo and I. A. Kalyaev and Y. I. Doronchenko and M. K. Raskladkin},
title = {Modern and next-generation high-performance computer systems with reconfigurable architecture},
journal = {Vestnik \^U\v{z}no-Uralʹskogo gosudarstvennogo universiteta. Seri\^a Vy\v{c}islitelʹna\^a matematika i informatika},
pages = {24--39},
year = {2015},
volume = {4},
number = {3},
language = {ru},
url = {http://geodesic.mathdoc.fr/item/VYURV_2015_4_3_a2/}
}
TY - JOUR AU - I. I. Levin AU - A. I. Dordopulo AU - I. A. Kalyaev AU - Y. I. Doronchenko AU - M. K. Raskladkin TI - Modern and next-generation high-performance computer systems with reconfigurable architecture JO - Vestnik Ûžno-Uralʹskogo gosudarstvennogo universiteta. Seriâ Vyčislitelʹnaâ matematika i informatika PY - 2015 SP - 24 EP - 39 VL - 4 IS - 3 UR - http://geodesic.mathdoc.fr/item/VYURV_2015_4_3_a2/ LA - ru ID - VYURV_2015_4_3_a2 ER -
%0 Journal Article %A I. I. Levin %A A. I. Dordopulo %A I. A. Kalyaev %A Y. I. Doronchenko %A M. K. Raskladkin %T Modern and next-generation high-performance computer systems with reconfigurable architecture %J Vestnik Ûžno-Uralʹskogo gosudarstvennogo universiteta. Seriâ Vyčislitelʹnaâ matematika i informatika %D 2015 %P 24-39 %V 4 %N 3 %U http://geodesic.mathdoc.fr/item/VYURV_2015_4_3_a2/ %G ru %F VYURV_2015_4_3_a2
I. I. Levin; A. I. Dordopulo; I. A. Kalyaev; Y. I. Doronchenko; M. K. Raskladkin. Modern and next-generation high-performance computer systems with reconfigurable architecture. Vestnik Ûžno-Uralʹskogo gosudarstvennogo universiteta. Seriâ Vyčislitelʹnaâ matematika i informatika, Tome 4 (2015) no. 3, pp. 24-39. http://geodesic.mathdoc.fr/item/VYURV_2015_4_3_a2/
[1] Kalyaev I.A., Levin I.I., Semernikov E.A., Shmoilov V.I., Reconfigurable multipipeline computing structures, ed. Kalyaev I. A., YUNTS RAN, Rostov-on-Don, 2009, 344 pp.
[2] Levin I.I., “Reconfigurable computer systems with open scalable architecture”, Parallel Computing and Control Problems, Proceedings of the Fifth International Conference (Moscow, Russia, October 26–28, 2010), 2010, 83–95
[3] Zotov V.Y., Design of digital devices based on Xilinx FPGAs using WebPACK ISE, Goryachaya liniya-Telekom, M., 2003, 624 pp.
[4] Quartus II Handbook Version 10.1, v. 1, Design and Synthesis, Altera Corporation, 2010
[5] Libero IDE v9.1 User's Guide, Actel Corporation, 2010
[6] Tarasov I., “Design for Xilinx FPGAs using high level languages and Vivado HLS”, Components and technologies, 2013, no. 12, 33–36
[7] (data obrascheniya 07.04.2015) http://www.mitrionics.com/
[8] I.A. Kalyaev, I.I. Levin, A.I. Dordopulo, L.M. Slasten, “Reconfigurable Computer Systems Based on Virtex-6 and Virtex-7 FPGAs”, Programmable Devices and Embedded Systems, 12:1, Proceedings Volumes (2013), 210–214 | DOI
[9] I.A. Kalyaev, I.I. Levin, A.I. Dordopulo, L.M. Slasten, “FPGA-based Reconfigurable Computer Systems”, Science and Information Conference (SAI) (London, UK, 7 Oct–9 Oct 2013), 2013, 148–155
[10] V.A. Gudkov, A.A. Gulenok, V.B. Kovalenko, L.M. Slasten, “Multi-level Programming of FPGA-based Computer Systems with Reconfigurable Macroobject Architecture”, Programmable Devices and Embedded Systems, 12:1, IFAC Proceedings Volumes (2013), 204–209 | DOI