An approach to the programming of supercomputers on the basis of multicore multithreaded chips
Numerical methods and programming, Tome 10 (2009) no. 3, pp. 123-128
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An approach to the development of parallel programs adapted to the architecture of supercomputers is proposed on the basis of multicore multithreaded chips. This approach is directed to overcome the negative effect of memory latency on the efficiency of parallel programs and can be considered as a method to develop scalable parallel programs.
Keywords:
architecture of supercomputers based on multicore multithreaded chips; scalable parallel programs; efficiency of parallel computing.
@article{VMP_2009_10_3_a12,
author = {V. V. Korneev},
title = {An approach to the programming of supercomputers on the basis of multicore multithreaded chips},
journal = {Numerical methods and programming},
pages = {123--128},
publisher = {mathdoc},
volume = {10},
number = {3},
year = {2009},
language = {ru},
url = {http://geodesic.mathdoc.fr/item/VMP_2009_10_3_a12/}
}
TY - JOUR AU - V. V. Korneev TI - An approach to the programming of supercomputers on the basis of multicore multithreaded chips JO - Numerical methods and programming PY - 2009 SP - 123 EP - 128 VL - 10 IS - 3 PB - mathdoc UR - http://geodesic.mathdoc.fr/item/VMP_2009_10_3_a12/ LA - ru ID - VMP_2009_10_3_a12 ER -
V. V. Korneev. An approach to the programming of supercomputers on the basis of multicore multithreaded chips. Numerical methods and programming, Tome 10 (2009) no. 3, pp. 123-128. http://geodesic.mathdoc.fr/item/VMP_2009_10_3_a12/