Geodesic
FPGA implementation of an SD-card encryptor based on Magma cipher in counter mode
Prikladnaya Diskretnaya Matematika. Supplement, no. 16 (2023), pp. 85-87 Cet article a éte moissonné depuis la source Math-Net.Ru

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A hardware implementation of an SDSC card encryptor based on Magma cipher in counter mode is described. Implementations using two different FPGA architectures and synthesis software have similar hardware resource utilization. Keystream generation does not depend on the data which allows to increase the clock frequency of the generator. It was shown that this approach significantly reduces device operation time.
Keywords: FPGA, Magma cipher, counter mode. 
@article{PDMA_2023_16_a21,
     author = {S. I. Razenkov},
     title = {FPGA implementation of an {SD-card} encryptor based on {Magma} cipher in counter mode},
     journal = {Prikladnaya Diskretnaya Matematika. Supplement},
     pages = {85--87},
     year = {2023},
     number = {16},
     language = {ru},
     url = {http://geodesic.mathdoc.fr/item/PDMA_2023_16_a21/}
}
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S. I. Razenkov. FPGA implementation of an SD-card encryptor based on Magma cipher in counter mode. Prikladnaya Diskretnaya Matematika. Supplement, no. 16 (2023), pp. 85-87. http://geodesic.mathdoc.fr/item/PDMA_2023_16_a21/

[1] SD Specifications. Part 1. Physical Layer Simplified Specification Version 9.00, SD Association, 2022

[2] GOST R 34.12-2015. Informatsionnaya tekhnologiya. Kriptograficheskaya zaschita informatsii. Blochnye shifry, Standartinform, M., 2015

[3] GOST R 34.13-2015. Informatsionnaya tekhnologiya. Kriptograficheskaya zaschita informatsii. Rezhimy raboty blochnykh shifrov, Standartinform, M., 2015