Geodesic
FPGA implementation of an SD-card encryptor based on Magma cipher in counter mode
Prikladnaya Diskretnaya Matematika. Supplement, no. 16 (2023), pp. 85-87

Voir la notice de l'article provenant de la source Math-Net.Ru

A hardware implementation of an SDSC card encryptor based on Magma cipher in counter mode is described. Implementations using two different FPGA architectures and synthesis software have similar hardware resource utilization. Keystream generation does not depend on the data which allows to increase the clock frequency of the generator. It was shown that this approach significantly reduces device operation time.
Keywords: FPGA, Magma cipher, counter mode. 
@article{PDMA_2023_16_a21,
     author = {S. I. Razenkov},
     title = {FPGA implementation of an {SD-card} encryptor based on {Magma} cipher in counter mode},
     journal = {Prikladnaya Diskretnaya Matematika. Supplement},
     pages = {85--87},
     publisher = {mathdoc},
     number = {16},
     year = {2023},
     language = {ru},
     url = {http://geodesic.mathdoc.fr/item/PDMA_2023_16_a21/}
}
TY  - JOUR
AU  - S. I. Razenkov
TI  - FPGA implementation of an SD-card encryptor based on Magma cipher in counter mode
JO  - Prikladnaya Diskretnaya Matematika. Supplement
PY  - 2023
SP  - 85
EP  - 87
IS  - 16
PB  - mathdoc
UR  - http://geodesic.mathdoc.fr/item/PDMA_2023_16_a21/
LA  - ru
ID  - PDMA_2023_16_a21
ER  - 
%0 Journal Article
%A S. I. Razenkov
%T FPGA implementation of an SD-card encryptor based on Magma cipher in counter mode
%J Prikladnaya Diskretnaya Matematika. Supplement
%D 2023
%P 85-87
%N 16
%I mathdoc
%U http://geodesic.mathdoc.fr/item/PDMA_2023_16_a21/
%G ru
%F PDMA_2023_16_a21
S. I. Razenkov. FPGA implementation of an SD-card encryptor based on Magma cipher in counter mode. Prikladnaya Diskretnaya Matematika. Supplement, no. 16 (2023), pp. 85-87. http://geodesic.mathdoc.fr/item/PDMA_2023_16_a21/