Verification of Synchronous-automaton Programs using LTL
Modelirovanie i analiz informacionnyh sistem, Tome 15 (2008) no. 2, pp. 46-49.

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The article presents a synchronous-automaton program verification technique with linear-time temporal logic containing past-tense operators. TempEst is examined as a tool set for converting LTL formulas. Properties specification and verification are explored through the travel clock example.
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S. V. Kubasov. Verification of Synchronous-automaton Programs using LTL. Modelirovanie i analiz informacionnyh sistem, Tome 15 (2008) no. 2, pp. 46-49. http://geodesic.mathdoc.fr/item/MAIS_2008_15_2_a6/

[1] S. V. Kubasov, “Verifikatsiya sinkhronno-avtomatnykh programm”, Modelirovanie i analiz informatsionnykh sistem, 14:4 (2007), 20–27

[2] L. J. Jagadeesan, C. Puchol, J. E. Von Olnhausen, “A formal approach to reactive system software: A telecommunications application in esterel”, Proceeding of the 1th workshop on Industrial-Strength formal specification techniques, IEEE Computer Society, Washington, DC, USA, 1995, 132–145

[3] L. J. Jagadeesan, C. Puchol, J.E. Von Olnhausen “Safety property verification of esterel programs and applications to telecommunications software”, Proceedings of the 7th international conference on computer aided verification, Longon, UK, 1995, 127–140