Inverse updated systolic RLS algorithm with regularized exponential forgetting
Kybernetika, Tome 32 (1996) no. 3, pp. 209-234 Cet article a éte moissonné depuis la source Czech Digital Mathematics Library

Voir la notice de l'article

Classification : 65U05, 93B30, 93E12, 93E24
@article{KYB_1996_32_3_a0,
     author = {Schier, Jan},
     title = {Inverse updated systolic {RLS} algorithm with regularized exponential forgetting},
     journal = {Kybernetika},
     pages = {209--234},
     year = {1996},
     volume = {32},
     number = {3},
     mrnumber = {1438216},
     zbl = {0870.93051},
     language = {en},
     url = {http://geodesic.mathdoc.fr/item/KYB_1996_32_3_a0/}
}
TY  - JOUR
AU  - Schier, Jan
TI  - Inverse updated systolic RLS algorithm with regularized exponential forgetting
JO  - Kybernetika
PY  - 1996
SP  - 209
EP  - 234
VL  - 32
IS  - 3
UR  - http://geodesic.mathdoc.fr/item/KYB_1996_32_3_a0/
LA  - en
ID  - KYB_1996_32_3_a0
ER  - 
%0 Journal Article
%A Schier, Jan
%T Inverse updated systolic RLS algorithm with regularized exponential forgetting
%J Kybernetika
%D 1996
%P 209-234
%V 32
%N 3
%U http://geodesic.mathdoc.fr/item/KYB_1996_32_3_a0/
%G en
%F KYB_1996_32_3_a0
Schier, Jan. Inverse updated systolic RLS algorithm with regularized exponential forgetting. Kybernetika, Tome 32 (1996) no. 3, pp. 209-234. http://geodesic.mathdoc.fr/item/KYB_1996_32_3_a0/

[1] D. D. Baer J. Paradeans: A formal definition for systolic systems. In: Parallel Algorithms and Architectures (A. Albrecht, H. Jung and K. Mehlhorn, eds.), Lecture Notes in Computer Science, Springer-Verlag, Berlin 1987.

[2] L. D. J. Eggermont, al. (eds.): VLSI Signal Processing VI. In: Proceedings of the IEEE Signal Processing Society Workshop. IEEE Press, Veldhoven 1993.

[3] J. Kadlec: The cell-level description of systolic block regularised QR filter. In: Proceedings of the IEEE Signal Processing Society Workshop (Eggermont et al., eds.), Veldhoven 1993, pp. 298-306.

[4] J. Kadlec F. M. F. Gaston G. W. Irwin: Systolic implementation of the regularised parameter estimator. In: VLSI Signal Processing V (K. Yao et al., eds.), IEEE Press, New York 1992, pp. 520-529.

[5] M. Kárný, al.: Design of linear quadratic adaptive control: Theory and algorithms for practice. Kybernetika 21 (1985), Supplement.

[6] J. G. McWhirter: Systolic array for recursive least squares by inverse iterations. In: Proceedings of the IEEE Signal Processing Society Workshop (Eggermont et al., eds.), Veldhoven 1993, pp. 435-443.

[7] J. G. McWhirter: A systolic array for recursive least squares estimation by inverse updates. In: International Conference on Control '94, IEE, London 1994.

[8] G. M. Megson: An Introduction to Systolic Array Design. Oxford University Press, Oxford 1992.

[9] M. Moonen J. G. McWhirter: A systolic array for recursive least squares by inverse updating. Electronics Letters 29 (1993), 13, 1217-1218.

[10] V. Peterka: Bayesian approach to system identification. In: Trends and Progress in System Identification (P. Eykhoff, ed.), IFAC Series for Graduates, Research Workers and Practising Engineers, Chapter 8. Pergamon Press, Oxford 1981. | MR

[11] V. Peterka: Control of uncertain processes: Applied theory and algorithms. Kybernetika 22 (1986), Supplement. | MR | Zbl

[12] J. Schier: Parallel Algorithms for Robust Adaptive Identification and Square-root LQG Control. Ph.D. Thesis, Faculty of Nuclear Sciences and Physical Engineering, Czech Technical University, Prague 1994.

[13] J. Schier: A Systolic Algorithm for the Block-regularized RLS Identification. Research Report No. 1807, Institute of Information Theory and Automation, Prague 1994.