Digital signal processors
Kybernetika, Tome 26 (1990) no. 3, pp. 206-220 Cet article a éte moissonné depuis la source Czech Digital Mathematics Library

Voir la notice de l'article

Classification : 94A12
@article{KYB_1990_26_3_a3,
     author = {Magyar, Andrej and Lacroix, Arild},
     title = {Digital signal processors},
     journal = {Kybernetika},
     pages = {206--220},
     year = {1990},
     volume = {26},
     number = {3},
     language = {en},
     url = {http://geodesic.mathdoc.fr/item/KYB_1990_26_3_a3/}
}
TY  - JOUR
AU  - Magyar, Andrej
AU  - Lacroix, Arild
TI  - Digital signal processors
JO  - Kybernetika
PY  - 1990
SP  - 206
EP  - 220
VL  - 26
IS  - 3
UR  - http://geodesic.mathdoc.fr/item/KYB_1990_26_3_a3/
LA  - en
ID  - KYB_1990_26_3_a3
ER  - 
%0 Journal Article
%A Magyar, Andrej
%A Lacroix, Arild
%T Digital signal processors
%J Kybernetika
%D 1990
%P 206-220
%V 26
%N 3
%U http://geodesic.mathdoc.fr/item/KYB_1990_26_3_a3/
%G en
%F KYB_1990_26_3_a3
Magyar, Andrej; Lacroix, Arild. Digital signal processors. Kybernetika, Tome 26 (1990) no. 3, pp. 206-220. http://geodesic.mathdoc.fr/item/KYB_1990_26_3_a3/

[1] A. V. Oppenheim: Application of digital signal processing. Prentice-Hall, Englewood Cliffs, N. J. 1978.

[2] L. R. Morris: Digital signal processing microprocessors: forward to the past?. IEEE Micro 6 (1986), 6, 6-8.

[3] M. Towsend M. E. Hoff, R. E. Holm: An NMOS microprocessor for analog signal processing. IEEE J. Solid-State Circuits SC-15 (1980), 1.

[4] T. Nishitani, al.: A single digital signal processor for telecommunication applications. IEEE J. Solid-State Circuits SC-16 (1980), 4, 372-376.

[5] $\mu$PD77C25 digital signal processor product description. NEC Electronics (Europe) GmbH, 1987.

[6] S. S. Magar at al.: A microcomputer with digital signal processing capability. Proc. International Solid State Conference, 1982.

[7] $\mu$PD77220/230 advanced digital signal processor product description. NEC Electronics (Europe) GmbH, 1987.

[8] S. Abiko at al.: Architecture and applications of a ICO-ns CMOS VLSI digital signal processor. Proc. of ICASSP'86 (Tokyo), 393-396.

[9] G. A. Frantz K. Lin J. B. Reimer, J. Bradley: The Texas Instruments TMS32CC25-digital signal microcomputer. IEEE Micro 6 (1986), 6, 10-28.

[10] E. A. Lee: Programmable DSP architectures: Part I. IEEE ASSP Magazine 5 (1988) 4, 4-19.

[11] K. L. Kloker: The Motorola DSP560CO digital signal processor. IEEE Micro 6 (1986), 6, 29-48.

[12] B. Eichen: NEC's $\mu$PD77230 digital signal processor. IEEE Micro 6 (1986), 6, 60-69.

[13] P. Papamichalis, R. Similar: The TMS32CC30 floating-point digital signal processor. IEEE Micro 8 (1988), 6, 13-29.

[14] M. L. Fuccio, al.: The DSP32C: AT & T's second-generation floating-point digital signal processor. IEEE Micro 8 (1988), 6, 30 - 48.

[15] J. R. Boddie, al.: The architecture, instruction set and development support for the WE*DSP32 digital signal processor. Proc. of ICASSP'86 (Tokyo), 421-424.

[16] G. R. L. Sohie, K. L. Kloker: A digital signal processor with IEEE floating-point arithmetic. IEEE Micro 8 (1988), 6, 49-67.

[17] K. L. Kloker, al.: The Motorola DSP96002 IEEE floating-point digital signal processor. Proc. of ICASSP'89 (Glasgow), 2480-2483.

[18] ANSI/IEEE standard 754- 1985: IEEE standard for binary floating-point arithmetic. IEEE Service Center, Piscataway, N. J. 1985.

[19] T. Nishitani, al.: CMOS floating point signal processor. Proc. of Internat. Conf. on Digital Signal Processing (Florence) 1984, 187-191.

[20] R. E. Owen: VLSI architecture for digital signal processing. VLSI Design (1984), 20 -28.

[21] R. H. Cushman: Third-generation DSPs put advanced functions on chip. EDN, July 11 (1985), 59-68.

[22] J. Titus: DSP ICs. EDN, October 16 (1986), 162-176.

[23] A. Aliphas, J. A. Feldman: The versatility of digital signal processing chips. IEEE Micro 7 (1987), 3,40-45.

[24] R. H. Cushman: $\mu$P-like DSP chips. EDN, September 3 (1987), 155-186.

[25] M. Leonard: Digital signal processors. ED, October 13 (1988), 161 - 166.

[26] D. Shear: /: EDN's DSP benchmarks. EDN, September 29 (1988) 126-148.

[27] D. Shear: HLL compilers and DSP run-time libraries make DSP system programming easy. EDN, June 23 (1988), 69-76.

[28] W. S. Gass, al.: Multiple digital signal processor environment for intelligent signal processing. Proc. IEEE 75 (1987), 9, 1246-1259.

[29] T. Nishitani: Trends for future microprogrammable signal processor. 6th Kobe Int. Symp. on Electronics and Information Sciences (Kobe), Japan, 1987.

[30] R. C Agarwal, J. W. Cooley: Vectorized mixed radix discrete Fourier transform algorithms. Proc. IEEE 75 (1987), 9, 1283- 1292.

[31] E. Lee, D. G. Messerschmitt: Synchronous data flow. Proc. IEEE 75 (1987), 9, 1235-1245.

[32] J. Gaudiot: Data-driven multicomputers in digital signal processing. Proc. IEEE 75 (1987), 9, 1220-1234.

[33] J. Hartung S. L. Gay, S. H. Haigh: A practical C language compiler/optimizer for real-time implementations on a family of floating point DSPs. Proc. of ICASSP'88 (New York), 1674-1677.

[34] R. Similar, A. Davis: The application of high-level languages to single-chip digital signal processors. Proc. of ICASSP'88 (New York), 1678-1681.

[35] P. E. Papamichalis: FFT implementation on the TMS32CC30. Proc. of ICASSP'88 (New York), 1399-1402.

[36] D. Bursky: Operating system for DSPs streamlines Programming. ED, October 13 (1988), 145-147.

[37] E. A. Lee, D. G. Messerschmitt: Static scheduling of synchronous data flow programs for digital signal processing. IEEE Trans. Computers 36 (1987), 2.

[38] E. A. Lee: Programmable DSP architectures: Part II. IEEE ASSP Magazine 6 (1989), 1, 4-14.

[39] S. Pope J. Rabary, R. W. Brodersen: An integrated automatic layout generation system for DSP circuits. IEEE Trans, on CAD 4 (1985), 3, 285-296.

[40] S. Gomez S. Gonzales D. Hsu, A. E. Kuo: An application-specific FFT processor. Electronic Engineering, June (1988), 99-106.

[41] M. Leonard: Building-block chips are busy widening DSP horizons. ED, March 31 (1988), 68-77.

[42] G. Luikuo M. Fleming, S. Magar: A 500 MOPS DSP chip set. Electronic Engineering, June (1988), 109-113.

[43] G. D. Hillman: DSP56200: An algorithm-specific digital signal processor peripheral. Proc. IEEE 75 (1987), 9, 1185-1191.

[44] N. M. Marinovic V. G. Oklodzija, L. Roytman: VLSI architecture of a real-time Wigner distribution processor for acoustic signals. Proc. of ICASSP'88 (New York), 2112 - 2115.

[45] J. P. Roesgen: A high performance microprocessor for DSP applications. Proc. of ICASSP'86 (Tokyo), 397-400.

[46] J. P. Roesgen: The ADSP-2100 DSP microprocessor. IEEE Micro 6 (1986), 6, 49-59.

[47] A. Genusov P. Feldman R. Friedlander, R. Shenhav: A new, highly parallel, 32 bit floating point DSP vector signal processor. Proc. of ICASSP'88 (New York), 2116-2119.

[48] S. A. Dyer, L. R. Morris: Floating-point signal processing chips: A new era for DSP systems design?. IEEE Micro 8 (1988), 6, 10-12.

[49] R. A. Roberts, C. T. Mullis: Digital Signal Processing. Addison-Wesley 1987. | Zbl

[50] L. R. Morris, S. A. Dyer: Floating-point digital signal processing chips: The end of the supercomputer era?. IEEE Micro 8 (1988), 6, 86.

[51] J. B. G. Roberts: Recent developments in parallel processing. Proc. of ICASSP'89 (Glasgow), 2461-2467.