A method of synthesis of irredundant circuits admitting single fault detection tests of constant length
Diskretnaya Matematika, Tome 29 (2017) no. 4, pp. 87-105

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A constructive proof is given that in each of the bases $B'=\{ x\mathbin{\} y, x\oplus y, x\sim y\}$, $B_1=\{ x\mathbin{\} y, x\oplus y, 1\}$ any $n$-place Boolean function may be implemented: a) by an irredundant combinational circuit with $n$ inputs and one output admitting (under single stuck-at faults at inputs and outputs of gates) a single fault detection test of length at most 16, b) by an irredundant combinational circuit with $n$ inputs and one output admitting (under single stuck-at faults at inputs and outputs of gates and at primary inputs) a single fault detection test of length at most $2n-2\log_2 n+O(1)$; besides, there exists an $n$-place function that cannot be implemented by an irredundant circuit admitting a detecting test whose length is smaller than $2n-2\log_2 n-\Omega(1)$, c) by an irredundant combinational circuit with $n$ inputs and three outputs admitting (under single stuck-at faults at inputs and outputs of gates and at primary inputs) a single fault detection test of length at most 17.
Keywords: circuit of gates, fault detection test, stuck-at fault, Shannon function, easily testable circuit.
@article{DM_2017_29_4_a5,
     author = {D. S. Romanov and E. Yu. Romanova},
     title = {A method of synthesis of irredundant circuits admitting single fault detection tests of constant length},
     journal = {Diskretnaya Matematika},
     pages = {87--105},
     publisher = {mathdoc},
     volume = {29},
     number = {4},
     year = {2017},
     language = {ru},
     url = {http://geodesic.mathdoc.fr/item/DM_2017_29_4_a5/}
}
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D. S. Romanov; E. Yu. Romanova. A method of synthesis of irredundant circuits admitting single fault detection tests of constant length. Diskretnaya Matematika, Tome 29 (2017) no. 4, pp. 87-105. http://geodesic.mathdoc.fr/item/DM_2017_29_4_a5/