%0 Journal Article
%A K. A. Popkov
%T Synthesis of easily testable logic networks under arbitrary stuck-at faults at inputs and outputs of gates
%J Prikladnaâ diskretnaâ matematika
%D 2019
%P 78-100
%N 1
%U http://geodesic.mathdoc.fr/item/PDM_2019_1_a5/
%G ru
%F PDM_2019_1_a5