%0 Journal Article
%A Pietroń, M.
%A Russek, P.
%A Wiatr, K.
%T Loop profiling tool for HPC code inspection as an efficient method of FPGA based acceleration
%J International Journal of Applied Mathematics and Computer Science
%D 2010
%P 581-589
%V 20
%N 3
%I mathdoc
%U http://geodesic.mathdoc.fr/item/IJAMCS_2010_20_3_a12/
%G en
%F IJAMCS_2010_20_3_a12