TY  - JOUR
AU  - Eduardas Bareiša
AU  - Vacius Jusas
AU  - Kęstutis Motiejūnas
AU  - Rimantas Šeinauskas
TI  - Functional Delay Test Generation Approach Using a Software Prototype of the Circuit
JO  - Computer Science and Information Systems
PY  - 2013
VL  - 10
IS  - 3
PB  - mathdoc
UR  - http://geodesic.mathdoc.fr/item/CSIS_2013_10_3_a11/
ID  - CSIS_2013_10_3_a11
ER  -