%0 Journal Article
%A Eduardas Bareiša
%A Vacius Jusas
%A Kęstutis Motiejūnas
%A Rimantas Šeinauskas
%T Functional Delay Test Generation Approach Using a Software Prototype of the Circuit
%J Computer Science and Information Systems
%D 2013
%V 10
%N 3
%I mathdoc
%U http://geodesic.mathdoc.fr/item/CSIS_2013_10_3_a11/
%F CSIS_2013_10_3_a11